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Scalable computer ARChitecture
SARC Project
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HIPEAC 2009 Conference

Date:Jan 25, 2009Location:Paphos, Cyprus
Duration:4 days
The embedded market evolves rapidly, expanding the capabilities of each new device, and making the previous ones obsolete as technology advances. In order to achieve the high performance required by new embedded applications, these embedded processors are increasingly high performance processors, with an increasing overlap between general purpose and embedded processors. However, performance does not simply increase with technology advances, it is essential to find a way to translate technology into performance, and such is the role of the computer architect and compiler builder.

The HiPEAC conference provides a high quality forum for computer architects and compiler builders working in the field of high performance computer architecture and compilation for embedded systems, but is also open to general purpose research which is becoming increasingly relevant to the embedded domain. The conference aims at the dissemination of advanced scientific knowledge and the promotion of international contacts among scientists from academia and industry.

Please visit the conference website to get more information on the event.

 Key Data
  • SARC is an integrated project concerned with long term research in advanced computer architecture
  • Duration: 4 years 
  • Main topic: advanced computer architecture
  • 16 European participants

IST-FET project funded under the 6th Framework Programme

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