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Scalable computer ARChitecture
 
SARC Project
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HIPEAC 2010 Conference in Pisa (deadline July 10, 2009)

Date:Jan 25, 2010Location:Pisa, Italy
Duration:4 days
 
Description: 
 
The challenges faced by the high-performance general-purpose and embedded worlds are converging. The embedded market evolves rapidly, quickly expanding the capabilities of new devices, and the requirements of these new applications demand technologies that not long ago were in the realm of high-performance computing. Conversely, the energy and cost constraints typical of the embedded world are now also among the most important design criteria for general purpose computing systems. Because performance no longer automatically increases with advances in semiconductor technology, it has become essential to discover new paths to optimize performance, energy and cost across software and hardware.

The HiPEAC conference provides a forum for computer and compiler architects in the field of high performance architecture and compilation for embedded and general-purpose systems, with a special emphasis on cross-cutting research that can be applied to both. The conference aims at the dissemination of advanced scientific knowledge and the promotion of international contacts among scientists from academia and industry.

The HIPEAC 2010 conference will be hosted in Pisa, ITALY.

Please visit the conference website to get more information on the event.


 Key Data
  • SARC is an integrated project concerned with long term research in advanced computer architecture
  • Duration: 4 years 
  • Main topic: advanced computer architecture
  • 16 European participants



IST-FET project funded under the 6th Framework Programme


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