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Scalable computer ARChitecture
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3rd HiPEAC Industrial Workshop

Date:Apr 17, 2007Location:Haifa, Israel
Duration:1 Day
Modern embedded architectures face a number of new challenges that are being introduced by technology limitations. Just a few of these challenges include ways to continue Moore's law in spite of the frequency wall and new methods to reduce power consumption. Despite these technology limitations, the embedded market still demands a continued increase in performance and a reduction in power consumption. Most of today's new embedded architectures introduce various types of parallelism to address these issues, including SIMD, SMT, SMP and multicore architectures. Some of the above parallelism in hardware is transparent to the end users but requires the compiler to better utilize the new features. Other directions rely on the users to guide the compiler and the system to utilize new hardware features. New dialects of current programming languages are needed and in some cases, new programming languages are required. This workshop will focus on these exciting new directions and how they are influencing the embedded architecture and compilation domain. The main focus of this workshop is advanced embedded computer architecture and compiler technology. The topics of interest for this workshop include, but are not limited to: Modern embedded architectures and computational models Compilers and tools for modern embedded computer systems Multicore, multithreaded, superscalar, and VLIW architectures Compiler/hardware support for hiding memory latencies Support for correctness in embedded hardware and software (esp. with concurrency) Reconfigurable computing Dynamic translation and optimization I/O issues in parallel computing and their relation to applications Parallel programming languages, algorithms and applications Middleware and run time system support for parallel embedded computing High performance application specific systems Performance tools for embedded application behavior understanding Non-traditional embedded computing systems topics More info on the Workshop

 Key Data
  • SARC is an integrated project concerned with long term research in advanced computer architecture
  • Duration: 4 years 
  • Main topic: advanced computer architecture
  • 16 European participants

IST-FET project funded under the 6th Framework Programme

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